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JournalTitleAuthors
Solid-State ElectronicsUltra-thin body & buried oxide SOI substrate development and qualification for Fully Depleted SOI device with back bias capabilityWalter Schwarzenbach, Bich-Yen Nguyen, Frederic Allibert, Christophe Girard, Christophe Maleville
2015 International Symposium on VLSI Technology, Systems and ApplicationsInvestigation of hot carrier reliability of SOI and strained SOI transistors using back biasG. Besnard, X. Garros, A. Subirats, F. Andrieu, X. Federspiel, M. Rafik, W. Schwarzenbach, G. Reimbold, O. Faynot, S. Cristoloveanu, C. Mazure
2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)Systematic evaluation of SOI Buried Oxide reliability for partially depleted and fully depleted applicationsW. Schwarzenbach, C. Malaquin, F. Allibert, G. Besnard, B.-Y. Nguyen
2015 IEEE International Reliability Physics SymposiumPerformance and reliability of strained SOI transistors for advanced planar FDSOI technologyG. Besnard, X. Garros, A. Subirats, F. Andrieu, X. Federspiel, M. Rafik, W. Schwarzenbach, G. Reimbold, O. Faynot, S. Cristoloveanu
ECS TransactionsLow-Temperature Microwave-Based Plasma Oxidation of Ge and Oxidation of Silicon Followed by Plasma NitridationW. Lerch, T. Schick, N. Sacher, W. Kegel, J. Niess, M. Czernohorsky, S. Riedel
2016 Joint International EUROSOI WorkshopAnalysis and modelling of temperature effect on DIBL in UTBB FD SOI MOSFETsA. S. N. Pereira, G. de Streel, N. Planes, M. Haond, R. Giacomini, D. Flandre, V. Kilchytska
ECS TransactionsDirect Characterization of Impact Ionization Current in Silicon-on-Insulator Body-Contacted MOSFETsC. Marquez, N. Rodriguez, J. M. Montes, R. Ruiz, F. Gamiz, C. Sampedro, A. Ohata
Solid-State ElectronicsImpact of non uniform strain configuration on transport properties for FD14+ devicesC. Medina-Bailon, C. Sampedro, F. Gámiz, A. Godoy, L. Donetti
2016 Joint International EUROSOI WorkshopElectrical characterization of Random Telegraph Noise in back-biased Ultrathin Silicon-On-Insulator MOSFETsCarlos Marquez, Noel Rodriguez, Francisco Gamiz, Akiko Ohata
2016 Joint International EUROSOI WorkshopConfinement orientation effects in S/D tunnelingC. Medina-Bailon, C. Sampedro, F. Gamiz, A. Godoy, L. Donetti
2015 45th European Solid State Device Research Conference (ESSDERC)Threshold voltage and on-current Variability related to interface traps spatial distributionV. Velayudhan, J. Martin-Martinez, M. Porti, C. Couso, R. Rodriguez, M. Nafria, X. Aymerich, C. Marquez, F. Gamiz
2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)Impact of S/D tunneling in ultrascaled devices, a Multi-Subband Ensemble Monte Carlo studyC. Medina-Bailon, C. Sampedro, F. Gamiz, A. Godoy, L. Donetti
2015 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)Multi-Subband Ensemble Monte Carlo simulation of Si nanowire MOSFETsLuca Donetti, Carlos Sampedro, Francisco Gamiz, Andres Godoy, Francisco J. Garcia-Ruiz, Ewan Towiez, Vihar P. Georgiev, Salvatore Maria Amoroso, Craig Riddet, Asen Asenov
Solid-State ElectronicsElectrical characterization of Random Telegraph Noise in Fully-Depleted Silicon-On-Insulator MOSFETs under extended temperature range and back-bias operationCarlos Marquez, Noel Rodriguez, Francisco Gamiz, Rafael Ruiz, Akiko Ohata
2015 IEEE International Electron Devices Meeting (IEDM)Physical modeling - A new paradigm in device simulationZ. Stanojevic, O. Baumgartner, F. Mitterbauer, H. Demel, C. Kernstock, M. Karner, V. Eyert, A. France-Lanord, P. Saxe, C. Freeman, E. Wimmer
2015 IEEE International Electron Devices Meeting (IEDM)Interest of SiCO low k=4.5 spacer deposited at low temperature (400°C) in the perspective of 3D VLSI integrationD. Benoit, J. Mazurier, B. Varadarajan, S. Chhun, S. Lagrasta, C. Gaumer, D. Galpin, C. Fenouillet-Beranger, D. Vo-Thanh, D. Barge, R. Duru, R. Beneyton, B. Gong, N. Sun, N. Chauvet, P. Ruault, D. Winandy, B. van Schravendijk, P. Meijer, O. Hinsinger